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dc.contributor.advisorKhan, Wahid A.en_US
dc.creatorDas, Mousumien_US
dc.date.accessioned2013-03-15T12:00:14Z
dc.date.available2013-03-15T12:00:14Z
dc.date.created2012-12en_US
dc.date.issued2013-03-14en_US
dc.date.submittedDecember 2012en_US
dc.identifier.urihttp://hdl.handle.net/10388/ETD-2012-12-842en_US
dc.description.abstractThe current trend of digital convergence creates the need for the video encoder and decoder system, known as codec in short, that should support multiple video standards on a single platform. In a modern video codec, quantization is a key unit used for video compression. In this thesis, a generalized quantization algorithm and hardware implementation is presented to compute quantized coefficient for six different video codecs including the new developing codec High Efficiency Video Coding (HEVC). HEVC, successor to H.264/MPEG-4 AVC, aims to substantially improve coding efficiency compared to AVC High Profile. The thesis presents a high performance circuit shared architecture that can perform the quantization operation for HEVC, H.264/AVC, AVS, VC-1, MPEG- 2/4 and Motion JPEG (MJPEG). Since HEVC is still in drafting stage, the architecture was designed in such a way that any final changes can be accommodated into the design. The proposed quantizer architecture is completely division free as the division operation is replaced by multiplication, shift and addition operations. The design was implemented on FPGA and later synthesized in CMOS 0.18 μm technology. The results show that the proposed design satisfies the requirement of all codecs with a maximum decoding capability of 60 fps at 187.3 MHz for Xilinx Virtex4 LX60 FPGA of a 1080p HD video. The scheme is also suitable for low-cost implementation in modern multi-codec systems.en_US
dc.language.isoengen_US
dc.subject8x8 Quantizationen_US
dc.subjectTransformen_US
dc.subjectH.264/AVCen_US
dc.subjectAVSen_US
dc.subjectHEVCen_US
dc.subjectVC-1en_US
dc.subjectMPEG-2/4en_US
dc.subjectMJPEGen_US
dc.titleA Cost Shared Quantization Algorithm and its Implementation for Multi-Standard Video CODECSen_US
thesis.degree.departmentElectrical and Computer Engineeringen_US
thesis.degree.disciplineElectrical Engineeringen_US
thesis.degree.grantorUniversity of Saskatchewanen_US
thesis.degree.levelMastersen_US
thesis.degree.nameMaster of Science (M.Sc.)en_US
dc.type.materialtexten_US
dc.type.genreThesisen_US
dc.contributor.committeeMemberKarki, Rajeshen_US
dc.contributor.committeeMemberBui, Francisen_US
dc.contributor.committeeMemberOguocha, Ikechukwuka N.en_US


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