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Analysis and modeling of underfill flow driven by capillary action in flip-chip packaging

dc.contributor.advisorZhang, W. J. (Chris)en_US
dc.contributor.committeeMemberWong, Stephenen_US
dc.contributor.committeeMemberTorvi, David A.en_US
dc.contributor.committeeMemberTabil, Lope G.en_US
dc.contributor.committeeMemberOguocha, Ikechukwuka N.en_US
dc.contributor.committeeMemberBergstrom, Donald J.en_US
dc.creatorWan, Jianwuen_US
dc.date.accessioned2005-01-27T21:30:38Zen_US
dc.date.accessioned2013-01-04T04:24:44Z
dc.date.available2005-01-28T08:00:00Zen_US
dc.date.available2013-01-04T04:24:44Z
dc.date.created2005-01en_US
dc.date.issued2005-01-24en_US
dc.date.submittedJanuary 2005en_US
dc.description.abstractFlip-chip underfilling is a technology by which silica-filled epoxy resin is used to fill the micro-cavity between a silicon chip and a substrate, by dispensing the liquid encapsulant at elevated temperatures along the periphery of one or two sides of the chip and then allowing capillary action to draw the material into the gap. Since the chip, underfill material, and substrate solidify together as one unit, thermal stresses on solder joints during the temperature cycling (which are caused by a mismatch in the coefficients of thermal expansion between the silicon chip and the organic substrate) can be redistributed and transferred away from the fragile bump zone to a more strain-tolerant region. Modeling of the flow behaviour of a fluid in the underfill process is the key to this technology. One of the most important drawbacks in the existing models is inadequate treatment of non-Newtonian fluids in the underfill process in the development of both analytical models and numerical models. Another important drawback is the neglect of the presence of solder bumps in the existing analytical models. This thesis describes a study in which a proper viscosity constitutive equation, power-law model, is employed for describing the non-Newtonian fluid behaviour in flip-chip package. Based on this constitutive equation, two analytical models with closed-form solutions for predicting the fluid filling time and fluid flow front position with respect to time were derived. One model is for a setting with two parallel plates as an approximate to flip-chip package, while the other model is for a setting with two parallel plates within which an array of solder bumps are present. Furthermore, a numerical model using a general-purpose finite element package ANSYS was developed to predict the fluid flow map in two dimensions. The superiority of these models to the existing models (primarily those developed at Cornell University in 1997) is confirmed based on the results of the experiments conducted in this study. This thesis also presents a finding of the notion of critical clearance in the design of a flip-chip package through a careful simulation study using the models developed. The flip-chip package design should make the clearance between solder bumps larger than the critical clearance.en_US
dc.identifier.urihttp://hdl.handle.net/10388/etd-01272005-213038en_US
dc.language.isoen_USen_US
dc.subjectSolder Bump Resistanceen_US
dc.subjectFlip-chip Packageen_US
dc.subjectCapillary Actionen_US
dc.subjectUnderfill Flowen_US
dc.subjectCritical Clearanceen_US
dc.titleAnalysis and modeling of underfill flow driven by capillary action in flip-chip packagingen_US
dc.type.genreThesisen_US
dc.type.materialtexten_US
thesis.degree.departmentMechanical Engineeringen_US
thesis.degree.disciplineMechanical Engineeringen_US
thesis.degree.grantorUniversity of Saskatchewanen_US
thesis.degree.levelDoctoralen_US
thesis.degree.nameDoctor of Philosophy (Ph.D.)en_US

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