PHASE-LOCKED LOOP CLOCK EXTRACTION FOR FDDI SYSTEMS
| dc.contributor.advisor | Dodds, D. | |
| dc.creator | Harris, G. Kate | |
| dc.date.accessioned | 2018-02-12T15:13:43Z | |
| dc.date.available | 2018-02-12T15:13:43Z | |
| dc.date.issued | 1988-05 | |
| dc.date.submitted | May 1988 | en_US |
| dc.description.abstract | The American National Standards Institute (ANSI) is in the process of standardizing a Fiber Distributed Data Interface (FDDI). This local area network optically transmits data at 125 Mb/s using a point to point clocking scheme. Data is transmitted at each station using the station clock and recovered at the next station by a clock extracted from the data. Clock recovery in the existing FDDI framework is investigated in this paper. The conditions necessary for clock recovery are reviewed, and the FDDI code analyzed for transmission and clock recovery qualities. The remainder of the thesis is devoted to the design and performance meets the performance criteria specified in the current FDDI draft standard. | en_US |
| dc.identifier.uri | http://hdl.handle.net/10388/8419 | |
| dc.title | PHASE-LOCKED LOOP CLOCK EXTRACTION FOR FDDI SYSTEMS | en_US |
| dc.type.genre | Thesis | en_US |
| thesis.degree.department | Electrical and Computer Engineering | en_US |
| thesis.degree.discipline | Electrical Engineering | en_US |
| thesis.degree.grantor | University of Saskatchewan | en_US |
| thesis.degree.level | Masters | en_US |
| thesis.degree.name | Master of Science (M.Sc.) | en_US |