Design and Implementation of an ATM Cell Router
Date
1995
Authors
Journal Title
Journal ISSN
Volume Title
Publisher
ORCID
Type
Degree Level
Masters
Abstract
The standard for emerging high speed digital telecommunication networks is Broadband Integrated Digital Networks (B-ISDN). Recent standards decisions have determined that B-ISDN will consist( of Asynchronous Transfer Mode (ATM) cell formats and switching coupled with Synchronous Optical Network (SONET) transfer on fibre.
One of the key requirements for B-ISDN is the development of affordable and reliable ATM switches.
This thesis proposes, models, designs, and implements a novel ATM switch design for use in B-ISDN. A direct binary hypercube network is selected as the switching fabric of the switch. The proposed switch uses a fault-tolerant, self-routing, distributed routing algorithm, known as the Saturated Constant Shuffle (SCS) routing algorithm. The basic SCS routing algorithm is 'loss-free'.
The switch design is optimized by simulation-based performance evaluation of the SCS routing algorithm and several variants. A logic equation specification of the switch architecture is given in Verilog. Several possible floorplans for a VLSI implementation are considered. Finally, as part of a larger team project, a complete VLSI implementation of the switch is produced.
Description
Keywords
Citation
Degree
Master of Science (M.Sc.)
Department
Computational Science