ULTRA-WIDEBAND NONLINEAR ECHO-CANCELLATION
Hybrid fiber coaxial (HFC) networks are used around the world to distribute cable television and broadband internet services to customers. These networks are governed by the Data-Over-Cable Service Interface Specification (DOCSIS) family of standards, with the most recent version at the time of this writing being DOCSIS 3.1. A frequency division duplex (FDD) spectrum is used in DOCSIS 3.1, where the upstream and downstream signals are separated in frequency to eliminate interference. A possible method to increase signal bandwidths is to use a full-duplex (FDX) spectrum, in which the US and DS signals use the same frequencies at the same time. A main challenge faced when implementing FDX in a DOCSIS node is eliminating the interference in the received US signal caused by the transmitted DS signal. One possible method for eliminating the interference is utilizing an echo-canceling algorithm, which predicts the self-interference (SI) based on the known DS signal and cancels it from the received US signal. Although echo-cancellation algorithms exist for fundamentally similar applications, the DOCSIS FDX case is more complicated for two main reasons. First, the DOCSIS node uses a nonlinear power amplifier to amplify the DS signal. Second, the DS signal is an ultra-wideband signal spanning a frequency range of up to 1.2 GHz. Most of the amplifier modeling techniques discussed in the literature were designed for narrowband wireless signals and will have limited performance when used with ultra-wideband signals. This thesis develops an algorithm to characterize the power amplifier and to predict the harmonics it generates for a given DS signal. These predicted harmonics can be used to cancel the SI signal in a full duplex DOCSIS system. The algorithm, which is referred to as the ultra-wideband memory polynomial (UWB-MP) model, is based on the well-known memory polynomial model with adaptations which allow the model to predict harmonics for ultra-wideband signals. Since a direct implementation of the UWB-MP model in an FPGA would result in very high resource usage, system architecture recommendations are provided. Our proposed implementation of the model compensates for harmonics up to and including the 3rd order, which has a power spectrum extending above 3600 MHz. Using the techniques discussed in this thesis, it is shown that a sampling rate of 4 GHz allows for cancellation of the SI signal while providing a reasonable balance between performance and resource usage. Matlab simulations of a DOCSIS node with various parameters and PA simulation models were conducted. The simulations showed that over 75 dB of cancellation of the SI signal is possible in an idealized hardware setup. It is also demonstrated that AWGN injected into the received signal does not reduce the ability of the model to estimate the PA harmonics, although the noise itself cannot be canceled. Further simulations showed that the UWB-MP model could cancel harmonics whose power is much higher than that specified in DOCSIS. Although the UWB-MP model was designed with memory polynomial type PAs in mind, simulation results show that significant cancellation is possible with PAs that are represented by Wiener models as well. Based on the simulation results, we recommend using a filter of length 20 coefficients for each harmonic in the UWB-MP model, and 60 iterations with 500 samples for estimating the coefficients with the least squares method.
DOCSIS, harmonic, amplifier, power amplifier, full-duplex, full duplex, nonlinear, echo-cancellation, echo cancellation, memory-polynomial, ultra-wideband memory-polynomial, wideband, ultra-wideband, DSP, signal processing, FPGA
Master of Science (M.Sc.)
Electrical and Computer Engineering