Scalable parallel architecture for biological neural simulation on hardware platforms
Date
2010-09
Authors
Journal Title
Journal ISSN
Volume Title
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ORCID
Type
Degree Level
Masters
Abstract
Difficulties and dangers in doing experiments on living systems and providing a
testbed for theorists make the biologically detailed neural simulation an essential part of
neurobiology. Due to the complexity of the neural systems and dynamic properties of the
neurons simulation of biologically realistic models is very challenging area. Currently all
general purpose simulator are software based. Limitation on the available processing
power provides a huge gap between the maximum practical simulation size and human
brain simulation as the most complex neural system. This thesis aimed at providing a
hardware friendly parallel architecture in order to accelerate the simulation process.
This thesis presents a scalable hierarchical architecture for accelerating simulations of
large-scale biological neural systems on field-programmable gate arrays (FPGAs). The
architecture provides a high degree of flexibility to optimize the parallelization ratio
based on available hardware resources and model specifications such as complexity of
dendritic trees. The whole design is based on three types of customized processors and a
switching module. An addressing scheme is developed which allows flexible integration
of various combination of processors. The proposed addressing scheme, design
modularity and data process localization allow the whole system to extend over multiple
FPGA platforms to simulate a very large biological neural system.
In this research Hodgkin-Huxley model is adopted for cell excitability. Passive
compartmental approach is used to model dendritic tree with any level of complexity.
The whole architecture is verified in MATLAB and all processor modules and the
switching unit implemented in Verilog HDL and Schematic Capture. A prototype
simulator is integrated and synthesized for Xilinx V5-330t-1 as the target FPGA. While
not dependent on particular IP (Intellectual Property) cores, the whole implementation is
based on Xilinx IP cores including IEEE-754 64-bit floating-point adder and multiplier
cores. The synthesize results and performance analyses are provided.
Description
Keywords
Biological Neuron, Simulation, FPGA, Parallel processing
Citation
Degree
Master of Engineering (M.Eng.)
Department
Electrical Engineering
Program
Electrical Engineering